Job Description

Role and Responsibilities:

This Network on a Chip IP team, works on all of Intel's 20 billion chips. This includes working on coherent and non-coherent, including AMBA protocols. It is crucial for both client, server, and data center chips at Intel.

Responsibilities will include but are not limited to:

• This intern will be working on verification of NOC designs while automating the flows of both designs and verification.

• Develops pre-Silicon functional validation infrastructure to verify system will meet design requirements.

• Creates automation flows for validation, CDC, Lint, Synth Automation for defining and running system simulation models and finding and implementing corrective measures for failing RTL tests.

• Analyzes, use results and modify tests.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidate must be enrolled in a Master's degree program in Electrical Computer Engineering Computer Science or related computing discipline with 3+ months of experience with:

• System Verilog Language

• Programming experience in languages like Python or Perl

Preferred Qualifications:

• Reading and interpreting technical specs and Register Transfer Level RTL code

• Programming experience in C and Object Oriented Programming Techniques , Computer Architecture , Digital Logic, Linux/UNIX , and related Tools

Requirements listed could be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations

US, OR, Hillsboro; US, TX, Austin

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

Annual Salary Range for jobs which could be performed in US, California: $63,000.00-$166,000.00

*Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.